507 lines
16 KiB
C
507 lines
16 KiB
C
/*
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* VPC-XT Revision 1.0
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*
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* Title : Sparc 2.0 Definitions for the CPU
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*
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* Description : Structures, macros and definitions for access to the
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* CPU registers
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*
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* Author : Andrew Guthrie
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*
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* Notes : This file is included by cpu.h and should NOT
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* be included directly by any other module.
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*/
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/* SccsID[]="@(#)host_cpu.h 1.22 4/15/91 Copyright Insignia Solutions Ltd."; */
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#ifdef CPU_30_STYLE
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#ifndef _HOST_CPU_H
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#define _HOST_CPU_H
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#ifdef MONITOR
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#include <monregs.h>
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#define getSTATUS() (getCF() | \
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getOF() << 11 | \
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getZF() << 6 | \
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getSF() << 7 | \
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getAF() << 4 | \
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getPF() << 2 | \
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getTF() << 8 | \
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getIF() << 9 | \
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getDF() << 10 | \
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getIOPL() << 12 | \
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getNT() << 14)
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#endif
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/*
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* Union representing different ways of accessing a register
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*
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* Should probably not be here, but is for historical reasons.
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*
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* If it goes, then host_cpu.h should have reached nirvana (i.e. be totally empty)!
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*/
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#ifdef BIGEND
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typedef union
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{
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word X;
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struct
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{ /* as two bytes */
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half_word high;
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half_word low;
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word pad;
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} byte;
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struct
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{ /* as 4 nibbles */
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word n3:4;
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word n2:4;
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word n1:4;
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word n0:4;
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word pad;
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} nibble;
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struct
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{ /* as 16 bits */
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word b15:1;
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word b14:1;
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word b13:1;
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word b12:1;
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word b11:1;
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word b10:1;
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word b9:1;
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word b8:1;
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word b7:1;
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word b6:1;
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word b5:1;
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word b4:1;
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word b3:1;
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word b2:1;
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word b1:1;
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word b0:1;
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word pad;
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} bit;
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} reg;
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#endif /* BIGEND */
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#ifdef LITTLEND
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typedef union
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{
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word X;
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struct
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{ /* as two bytes */
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half_word low;
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half_word high;
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} byte;
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} reg;
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#endif /* LITTLEND */
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#endif
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#else /* CPU_30_STYLE */
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/*
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* ============================================================================
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* Structure/Data definitions
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* ============================================================================
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*/
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/*
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* Union representing different ways of accessing a register
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*/
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typedef union
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{
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word X;
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struct
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{ /* as two bytes */
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half_word high;
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half_word low;
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word pad;
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} byte;
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struct
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{ /* as 4 nibbles */
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word n3:4;
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word n2:4;
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word n1:4;
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word n0:4;
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word pad;
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} nibble;
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struct
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{ /* as 16 bits */
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word b15:1;
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word b14:1;
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word b13:1;
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word b12:1;
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word b11:1;
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word b10:1;
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word b9:1;
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word b8:1;
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word b7:1;
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word b6:1;
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word b5:1;
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word b4:1;
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word b3:1;
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word b2:1;
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word b1:1;
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word b0:1;
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word pad;
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} bit;
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} reg;
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#ifdef A2CPU
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/*
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* The Fast CPU status register structure ....
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*/
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typedef struct
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{
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word pad:5;
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word DF:1;
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word IF:1;
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word TF:1;
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word pad1:8;
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} sreg;
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#endif A2CPU
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/*
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* ============================================================================
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* External declarations and macros
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* ============================================================================
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*/
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extern word m_s_w;
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#ifndef EGATEST
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#ifdef A2CPU
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extern int compile_everything;
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extern short host_event;
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extern char *CPU_00[]; /* CPU main jump table */
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extern char *int_table[]; /* CPU interrupt jump table */
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#endif A2CPU
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/* common READ functions */
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#define getAX() ((*getAX_func) ())
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#define getAH() ((*getAH_func) ())
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#define getAL() ((*getAL_func) ())
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#define getBX() ((*getBX_func) ())
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#define getBH() ((*getBH_func) ())
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#define getBL() ((*getBL_func) ())
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#define getCX() ((*getCX_func) ())
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#define getCH() ((*getCH_func) ())
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#define getCL() ((*getCL_func) ())
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#define getDX() ((*getDX_func) ())
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#define getDH() ((*getDH_func) ())
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#define getDL() ((*getDL_func) ())
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#define getSP() ((*getSP_func) ())
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#define getBP() ((*getBP_func) ())
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#define getSI() ((*getSI_func) ())
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#define getDI() ((*getDI_func) ())
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#define getIP() ((*getIP_func) ())
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#define getCS() ((*getCS_func) ())
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#define getDS() ((*getDS_func) ())
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#define getES() ((*getES_func) ())
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#define getSS() ((*getSS_func) ())
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#define getMSW() ((*getMSW_func) ())
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#define getDF() ((*getDF_func) ())
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#define getIF() ((*getIF_func) ())
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#define getTF() ((*getTF_func) ())
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#define getPF() ((*getPF_func) ())
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#define getAF() ((*getAF_func) ())
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#define getSF() ((*getSF_func) ())
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#define getZF() ((*getZF_func) ())
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#define getOF() ((*getOF_func) ())
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#define getCF() ((*getCF_func) ())
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#ifdef CCPU
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/* CCPU-specific READ functions */
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#define getCPL() ((*getCPL_func) ())
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#define getGDTR_base() ((*getGDTR_base_func) ())
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#define getGDTR_limit() ((*getGDTR_limit_func) ())
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#define getIDTR_base() ((*getIDTR_base_func) ())
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#define getIDTR_limit() ((*getIDTR_limit_func) ())
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#define getLDTR() ((*getLDTR_func) ())
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#define getTR() ((*getTR_func) ())
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#define getMSW_reserved() ((*getMSW_reserved_func) ())
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#define getTS() ((*getTS_func) ())
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#define getEM() ((*getEM_func) ())
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#define getMP() ((*getMP_func) ())
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#define getPE() ((*getPE_func) ())
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#define getNT() ((*getNT_func) ())
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#define getIOPL() ((*getIOPL_func) ())
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#define getSTATUS() ((*getSTATUS_func) ())
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#endif CCPU
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#ifdef A2CPU
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/* Assembler CPU specific READ functions */
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#define getOPA() ((*getOPA_func) ())
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#define getOPB() ((*getOPB_func) ())
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#define getOPR() ((*getOPR_func) ())
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#define getSSD() ((*getSSD_func) ())
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#define getDSD() ((*getDSD_func) ())
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#endif A2CPU
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/* common WRITE functions */
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#define setAX(val) ((*setAX_func) (val))
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#define setAH(val) ((*setAH_func) (val))
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#define setAL(val) ((*setAL_func) (val))
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#define setBX(val) ((*setBX_func) (val))
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#define setBH(val) ((*setBH_func) (val))
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#define setBL(val) ((*setBL_func) (val))
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#define setCX(val) ((*setCX_func) (val))
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#define setCH(val) ((*setCH_func) (val))
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#define setCL(val) ((*setCL_func) (val))
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#define setDX(val) ((*setDX_func) (val))
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#define setDH(val) ((*setDH_func) (val))
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#define setDL(val) ((*setDL_func) (val))
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#define setSP(val) ((*setSP_func) (val))
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#define setBP(val) ((*setBP_func) (val))
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#define setSI(val) ((*setSI_func) (val))
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#define setDI(val) ((*setDI_func) (val))
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#define setIP(val) ((*setIP_func) (val))
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#define setCS(val) ((*setCS_func) (val))
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#define setDS(val) ((*setDS_func) (val))
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#define setES(val) ((*setES_func) (val))
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#define setSS(val) ((*setSS_func) (val))
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#define setMSW(val) ((*setMSW_func) (val))
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#define setDF(val) ((*setDF_func) (val))
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#define setIF(val) ((*setIF_func) (val))
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#define setTF(val) ((*setTF_func) (val))
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#define setPF(val) ((*setPF_func) (val))
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#define setAF(val) ((*setAF_func) (val))
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#define setSF(val) ((*setSF_func) (val))
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#define setZF(val) ((*setZF_func) (val))
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#define setOF(val) ((*setOF_func) (val))
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#define setCF(val) ((*setCF_func) (val))
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#ifdef CCPU
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/* CCPU-specific WRITE functions */
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#define setCPL(val) ((*setCPL_func) (val))
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#define setGDTR_base(val) ((*setGDTR_base_func) (val))
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#define setGDTR_limit(val) ((*setGDTR_limit_func) (val))
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#define setIDTR_base(val) ((*setIDTR_base_func) (val))
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#define setIDTR_limit(val) ((*setIDTR_limit_func) (val))
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#define setLDTR(val) ((*setLDTR_func) (val))
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#define setTR(val) ((*setTR_func) (val))
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#define setMSW_reserved(val) ((*setMSW_reserved_func) (val))
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#define setTS(val) ((*setTS_func) (val))
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#define setEM(val) ((*setEM_func) (val))
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#define setMP(val) ((*setMP_func) (val))
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#define setPE(val) ((*setPE_func) (val))
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#define setNT(val) ((*setNT_func) (val))
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#define setIOPL(val) ((*setIOPL_func) (val))
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#endif CCPU
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#ifdef A2CPU
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/* Assembler CPU specific WRITE functions */
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#define setOPLEN ((*setOPLEN_func) (val))
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#define setOPA() ((*setOPA_func) (val))
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#define setOPB() ((*setOPB_func) (val))
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#define setOPR() ((*setOPR_func) (val))
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#endif A2CPU
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#endif EGATEST
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/* HOST_SIMULATE function */
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#define host_simulate() ((*host_simulate_func) ())
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/* common access functions. Load at boot and cpu switch times. */
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/* common READ functions */
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extern word (*getAX_func) ();
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extern half_word (*getAH_func) ();
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extern half_word (*getAL_func) ();
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extern word (*getBX_func) ();
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extern half_word (*getBH_func) ();
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extern half_word (*getBL_func) ();
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extern word (*getCX_func) ();
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extern half_word (*getCH_func) ();
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extern half_word (*getCL_func) ();
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extern word (*getDX_func) ();
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extern half_word (*getDH_func) ();
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extern half_word (*getDL_func) ();
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extern word (*getSP_func) ();
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extern word (*getBP_func) ();
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extern word (*getSI_func) ();
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extern word (*getDI_func) ();
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extern word (*getIP_func) ();
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extern word (*getCS_func) ();
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extern word (*getDS_func) ();
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extern word (*getES_func) ();
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extern word (*getSS_func) ();
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extern word (*getMSW_func) ();
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extern word (*getDF_func) ();
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extern word (*getIF_func) ();
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extern word (*getTF_func) ();
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extern word (*getPF_func) ();
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extern word (*getAF_func) ();
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extern word (*getSF_func) ();
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extern word (*getZF_func) ();
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extern word (*getOF_func) ();
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extern word (*getCF_func) ();
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extern word (*getSTATUS_func) ();
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#ifdef CCPU
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/* CCPU-specific READ functions */
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extern int (*getCPL_func) ();
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extern sys_addr (*getGDTR_base_func) ();
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extern word (*getGDTR_limit_func) ();
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extern sys_addr (*getIDTR_base_func) ();
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extern word (*getIDTR_limit_func) ();
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extern word (*getLDTR_func) ();
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extern word (*getTR_func) ();
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extern word (*getMSW_reserved_func) ();
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extern word (*getTS_func) ();
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extern word (*getEM_func) ();
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extern word (*getMP_func) ();
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extern word (*getPE_func) ();
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extern word (*getNT_func) ();
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extern word (*getIOPL_func) ();
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#endif CCPU
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#ifdef A2CPU
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/* Assembler CPU specific READ functions */
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extern double_word (*getOPA_func) ();
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extern double_word (*getOPB_func) ();
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extern double_word (*getOPR_func) ();
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extern sys_addr (*getSSD_func) ();
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extern sys_addr (*getDSD_func) ();
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#endif A2CPU
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/* common WRITE functions */
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extern void (*setAX_func) ();
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extern void (*setAH_func) ();
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extern void (*setAL_func) ();
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extern void (*setBX_func) ();
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extern void (*setBH_func) ();
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extern void (*setBL_func) ();
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extern void (*setCX_func) ();
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extern void (*setCH_func) ();
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extern void (*setCL_func) ();
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extern void (*setDX_func) ();
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extern void (*setDH_func) ();
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extern void (*setDL_func) ();
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extern void (*setSP_func) ();
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extern void (*setBP_func) ();
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extern void (*setSI_func) ();
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extern void (*setDI_func) ();
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extern void (*setIP_func) ();
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extern void (*setCS_func) ();
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extern void (*setDS_func) ();
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extern void (*setES_func) ();
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extern void (*setSS_func) ();
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extern void (*setMSW_func) ();
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extern void (*setDF_func) ();
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extern void (*setIF_func) ();
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extern void (*setTF_func) ();
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extern void (*setPF_func) ();
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extern void (*setAF_func) ();
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extern void (*setSF_func) ();
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extern void (*setZF_func) ();
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extern void (*setOF_func) ();
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extern void (*setCF_func) ();
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#ifdef CCPU
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/* CCPU-specific WRITE functions */
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extern void (*setCPL_func) ();
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extern void (*setGDTR_base_func) ();
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extern void (*setGDTR_limit_func) ();
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extern void (*setIDTR_base_func) ();
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extern void (*setIDTR_limit_func) ();
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extern void (*setLDTR_func) ();
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extern void (*setTR_func) ();
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extern void (*setMSW_reserved_func) ();
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extern void (*setTS_func) ();
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extern void (*setEM_func) ();
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extern void (*setMP_func) ();
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extern void (*setPE_func) ();
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extern void (*setNT_func) ();
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extern void (*setIOPL_func) ();
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#endif CCPU
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#ifdef A2CPU
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/* Assembler CPU specific WRITE functions */
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extern void (*setOPLEN_func) ();
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extern void (*setOPA_func) ();
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extern void (*setOPB_func) ();
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extern void (*setOPR_func) ();
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#endif A2CPU
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/* HOST_SIMULATE function */
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extern void (*host_simulate_func) ();
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/*
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*
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*******************************************************************
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* The Second Assembler cpu register access functions. *
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*******************************************************************
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*
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*/
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#ifdef A2CPU
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extern sreg INTEL_STATUS;
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extern void (*R_ROUTE)();
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extern int R_INTR;
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extern reg R_AX; /* Accumulator */
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extern reg R_BX; /* Base */
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extern reg R_CX; /* Count */
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extern reg R_DX; /* Data */
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extern reg R_SP; /* Stack Pointer */
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extern reg R_BP; /* Base pointer */
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extern reg R_SI; /* Source Index */
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extern reg R_DI; /* Destination Index */
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extern double_word R_OPA;
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extern double_word R_OPB;
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extern double_word R_OPR;
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extern int R_MISC_FLAGS;
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extern sys_addr R_IP; /* Instruction Pointer */
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extern sys_addr R_ACT_CS; /* Code Segment */
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extern sys_addr R_ACT_DS; /* Data Segment */
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extern sys_addr R_ACT_SS; /* Stack Segment */
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extern sys_addr R_ACT_ES; /* Extra Segment */
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extern sys_addr R_DEF_SS; /* Default SS register */
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extern sys_addr R_DEF_DS; /* Default DS register */
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extern void do_setSF();
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extern void do_setOF();
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extern void do_setPF();
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extern void do_setZF();
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extern void do_setCF();
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#define BYTE_OPERATION 0x80000000
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#define WORD_OPERATION 0
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#define IS_BYTE_OP (R_MISC_FLAGS < 0)
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#define REALLY_ZERO (R_MISC_FLAGS & 1)
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/*
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NB. retl does jmp %o7+8
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*/
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#define setROUTE(val) R_ROUTE = (void *)((int)(val) - 8)
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#define setINTR(val) R_INTR = ( val )
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#define setbitINTR(val) R_INTR |= ( val )
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#define clrbitINTR(val) R_INTR &= ~( val )
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#define getROUTE() (R_ROUTE)
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#define getINTR() (R_INTR)
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#endif A2CPU
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#endif /* CPU_30_STYLE */
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