195 lines
4.7 KiB
C
195 lines
4.7 KiB
C
/**************************************************************************
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*
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* $RCSfile: bma_en.c $
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* $Source: u:/si/VXP/Wdm/Encore/52x/bma_en.c $
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* $Author: Max $
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* $Date: 1998/09/15 23:44:24 $
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* $Revision: 1.2 $
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*
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* Modified by DMui to bring it up 526 level
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*
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* Copyright (C) 1993, 1997 AuraVision Corporation. All rights reserved.
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*
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* AuraVision Corporation makes no warranty of any kind, express or
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* implied, with regard to this software. In no event shall AuraVision
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* Corporation be liable for incidental or consequential damages in
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* connection with or arising from the furnishing, performance, or use of
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* this software.
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*
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***************************************************************************/
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#ifdef VTOOLSD
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#include <vtoolsc.h>
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#include "monovxd.h"
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#else
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#include "Headers.h"
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#pragma hdrstop
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#endif
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#include "bmaster.h"
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#include "boardio.h"
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#include "fpga.h"
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#include "avport.h"
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WORD TransferCompleted = 0;
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BOOL s_bIsVxp524 = FALSE;
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/////////////////////////////////////////////////////////////////////
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// BMA_Init
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// This wAMCCBase is equivalent to VxP base address
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/////////////////////////////////////////////////////////////////////
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// 526 Modified by DMUI 4/29/98
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BOOL BMA_Init( DWORD wAMCCBase, BOOL bIsVxp524 )
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{
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UINT1 data;
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MonoOutStr( " [BMA_Init " );
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MonoOutHex( wAMCCBase );
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s_bIsVxp524 = bIsVxp524;
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if(!Init_VxP_IO(wAMCCBase))
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return FALSE;
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IHW_SetRegister(0x1F,0);
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data = IHW_GetRegister(0x9);
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// Set up the global register and do global reset
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IHW_SetRegister(0x9,0x60);
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// Clear out the input config, no DMA transfer
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IHW_SetRegister(0x35,(BYTE)((IHW_GetRegister(0x35) & ~0x10) | 0x02));
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// Don't generate interrupt
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IHW_SetRegister(0x60,0);
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// Clear interrupt status
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IHW_SetRegister(0x61,0);
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IHW_SetRegister(0x2f,0x23);
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// IHW_SetRegister(0x9,0xD0); // Flush it
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IHW_SetRegister(0x9,0x60);
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MonoOutStr( "] " );
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return TRUE;
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}
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BOOL BMA_Flush( )
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{
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BYTE state;
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MonoOutStr( "[BMA_Flush " );
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IHW_SetRegister(0x35,(BYTE)((IHW_GetRegister(0x35) & ~0x10) | 0x02));
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// Clear interrupt status
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IHW_SetRegister(0x61,0);
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// Flush FIFO
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state = IHW_GetRegister(0x9);
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IHW_SetRegister(0x9,(BYTE)(state | 0x10));
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// Add global for 524 (see comments in DeviceID.c)
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// Important: add it in exactly this place. Otherwise there'll be a flicker
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if( s_bIsVxp524 )
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IHW_SetRegister(0x9,0xD0); // Flush it
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IHW_SetRegister(0x9,(BYTE)(state & ~0x10));
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MonoOutStr( "OK]" );
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return TRUE;
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}
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/////////////////////////////////////////////////////////////////////
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// BMA_Reset
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//
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/////////////////////////////////////////////////////////////////////
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// 526 Modified by DMUI 4/29/98
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BOOL BMA_Reset( )
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{
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MonoOutStr( "[BMA_Reset " );
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// Disable DMA Transfer
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IHW_SetRegister(0x35,(BYTE)(IHW_GetRegister(0x35) & ~0x10));
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BMA_Flush();
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// Clear the status flag
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IHW_SetRegister(0x61,0x0);
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MonoOutStr( "OK ]" );
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return TRUE;
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}
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/////////////////////////////////////////////////////////////////////
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// BMA_Send
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// Set up the DMA register, send the data and leave
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// dwpData is the physical address and dwCount is the number of byte
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/////////////////////////////////////////////////////////////////////
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// 526 Modified by DMUI 4/29/98
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BOOL BMA_Send( DWORD *dwpData, DWORD dwCount )
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{
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UINT4 addr;
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BOOL bNotDword;
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if( !dwCount )
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{
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MonoOutStr("0 bytes transfer!!!!!!!\n");
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return TRUE;
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}
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addr = (UINT4)dwpData;
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// Set address register
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IHW_SetRegister(0x0,(UINT1)addr);
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IHW_SetRegister(0x1,(UINT1)(addr>>8));
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IHW_SetRegister(0x2,(UINT1)(addr>>16));
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IHW_SetRegister(0x3,(UINT1)(addr>>24));
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// If the counter number is not DWORD-aligned we have to fix it up
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bNotDword = (BOOL)(dwCount % sizeof( DWORD ));
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if( bNotDword )
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dwCount = 4*(dwCount/4+1);
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// Set transfer count (in bytes)
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IHW_SetRegister(0x4,(UINT1)dwCount);
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IHW_SetRegister(0x5,(UINT1)(dwCount>>8));
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IHW_SetRegister(0x6,(UINT1)(dwCount>>16));
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IHW_SetRegister(0x7,0xFF); // Burst size
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IHW_SetRegister(0x8,0x0F);
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// Set flag giving the information about whether buffer's size is DWORD aligned or not
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if( bNotDword == FALSE )
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IHW_SetRegister(0x9,0x40);
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else
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IHW_SetRegister(0x9,0x41);
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// Clear the status flag
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IHW_SetRegister(0x61,0x0);
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// Turn on interrupt
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IHW_SetRegister(0x60,0x10);
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IHW_SetRegister(0x35,(BYTE)(IHW_GetRegister(0x35) | 0x10));
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return TRUE;
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}
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/////////////////////////////////////////////////////////////////////
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// BMA_Complete
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//
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// Check to see if the DMA transfer is completed
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/////////////////////////////////////////////////////////////////////
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BOOL BMA_Complete()
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{
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WORD state61;
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state61 = IHW_GetRegister(0x61);
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return (BOOL)(state61 & 0x10);
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}
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